Category Archives: Data Acquisition Systems

multilayer PCBs

DATA ACQUISITION SYSTEM FOR FIBER BRAG GRATING SYSTEM

Data acquisition system (DAQ) is an information system that collects stores and distributes information. It is used in industrial and commercial electronics, and environmental and scientific equipment to capture electrical signals or environmental conditions on a computer device.

DATA ACQUISITION SYSTEM FOR FIBER BRAG GRATING SYSTEM

Overview

The most straightforward means for interrogation of a FBG sensor element is to illuminate the
FBG sensor (s) by broadband source & the narrowband component reflected by the FBG is
directed to the wavelength detection system as shown in the below figure.
CCD is illuminated by the optical signals reflected by the FBGs. This implementation supports 8 CCD’s. CCD sensor using Argus developed FPGA controller board.
The FPGA used for the control of CCD processor is Xilinx FPGA — XC3SD1800A-
4CSG484C.

DATA ACQUISITION SYSTEM for fiber brag grating system

Hardware Implementation

  • Aligtron 1×8 Latching Fiber optic Switch (MEMS Latch)
  • InGaAs linear image sensor (Hamamatsu)
  • Image Signal Processor (AD9826)
  • Field Programmable Gate Array Logic (FPGA)
  • Programmable system on chip PSoC5LP)
  • SRAM Memory Unit for data storage
  • System Clock 25MHz
  • Single Power supply (9V, ~300mA)

Block Diagram of the Data Acquisition System Controller

Block Diagram of the Data Acquisition System Controller

Functional Description

  • Receives command bytes from PC to FPGA through UART protocol and act accordingly
  • Controls all the other peripherals in the “FPGA controller board” by providing required
    inputs to them.
  • Receives the signals from the sensor, & modifies them as required control signals for the
    ADC.
  • Receives 8 bit output from the ADC, makes it into 16 bit word & stores in its memory.
  • Sends this 256 * 16 bit words (each pixel voltage in binary) to the Programmable system on
    chip (PSoC5LP – CY8C58LP).
  • Finally, the data stored in the PSoC is displayed on the PC or any other host devices through
    USB by using Lab View software (version 14.4).

Flow of the Hardware

Flow of the Hardware

Key Features

  • Used for detecting the narrow band signal from a broad band source i.e. of infrared rays &
    near visible signals.
  • Supports protocols such as UART, USB, FLASH
  • Synchronous Design
  • System clock speed used is 25 MHz.
  • Design is implemented using Verilog HDL

Advantages

  • Silicon Proven on Xilinx FPGA Spartan-3A DSP (XC3SD1800A-4CSG484C) using ISE
    14.3 and higher versions.
  • The spartan-3A DSP FPGA combined with proven 90nm process technology which delivers
    more functionality and bandwidth.
  • Set up is handy to carry and even give accurate results in sampling the CCD waveform.
  • Customizable with easy integration.
  • Gate count is approximately 1150 logic cells

Argus technologies is specialized in offering Customized product design service which can be on turnkey basis or with limited involvement in the project. Our core expertise lies in area of Product Design, Electronic manufacturing, Embedded Software Development, PCB Layout Design Service, Contract manufacturing including prototype to production and highly specialized software development in embedded domain.